Experimental Analysis of Algorithms for Coflow Scheduling

Modern data centers face new scheduling challenges in optimizing job-level performance objectives, where a significant challenge is the scheduling of highly parallel data flows with a common performance goal (e.g., the shuffle operations in MapReduce applications). Chowdhury and Stoica introduced the coflow abstraction to capture these parallel communication patterns, and Chowdhury et al. proposed effective heuristics to schedule coflows efficiently. In our previous paper, we considered the strongly NP-hard problem of minimizing the total weighted completion time of coflows with release dates, and developed the first polynomial-time scheduling algorithms with O(1)-approximation ratios. In this paper, we carry out a comprehensive experimental analysis on a Facebook trace and extensive simulated instances to evaluate the practical performance of several algorithms for coflow scheduling, including the approximation algorithms developed in our previous paper. Our experiments suggest that simple algorithms provide effective approximations of the optimal, and that the performance of our approximation algorithms is relatively robust, near optimal, and always among the best compared with the other algorithms, in both the offline and online settings.Comment: 29 pages, 8 figures, 11 table

Fast and Uniform Optically-Switched Data Centre Networks Enabled by Amplitude Caching

We propose amplitude caching to optically equalise burst mode traffic without delay stages. Through a fast, optically-switched system prototype, we demonstrate burst-mode penalties can be mitigated to within 0.4 dB at the KR4 HD-FEC level

Hybrid Wavelength Switched-TDMA High Port Count All-Optical Data Centre Switch

The physical layer, data plane design of an all-optical network switch capable of scaling to 1024 ports at 25 Gb/s per port is presented and experimentally evaluated. Fast tuning DSDBR lasers modulated with line-coded bipolar data allow combined wavelength switching and TDMA to provide packet switch-like functionality with over 2 Tb/s of total switch bandwidth. A passive fibre star coupler core with high sensitivity, DSP-free coherent receivers creates a low complexity, easily upgradeable building block for data centre networks

Synchronous subnanosecond clock and data recovery for optically switched data centres using clock phase caching

The rapid growth in the amount of data being transferred within data centres, combined with the slowdown in Moore’s Law, creates challenges for the future scalability of electronically switched data-centre networks. Optical switches could offer a future-proof alternative, and photonic integration platforms have been demonstrated with nanosecond-scale optical switching times. End-to-end switching time is, however, currently limited by the clock and data recovery time, which typically takes microseconds, removing the benefits of nanosecond optical switching. Here we show that a clock phase caching technique can provide clock and data recovery times of under 625 ps (16 symbols at 25.6 Gb s−1). Our approach uses the measurement and storage of clock phase values in a synchronized network to simplify clock and data recovery versus conventional asynchronous approaches. We demonstrate the capabilities of our technique using a real-time prototype with commercial transceivers and validate its resilience against temperature variation and clock jitter

Low rank approximation of multidimensional data

In the last decades, numerical simulation has experienced tremendous improvements driven by massive growth of computing power. Exascale computing has been achieved this year and will allow solving ever more complex problems. But such large systems produce colossal amounts of data which leads to its own difficulties. Moreover, many engineering problems such as multiphysics or optimisation and control, require far more power that any computer architecture could achieve within the current scientific computing paradigm. In this chapter, we propose to shift the paradigm in order to break the curse of dimensionality by introducing decomposition to reduced data. We present an extended review of data reduction techniques and intends to bridge between applied mathematics community and the computational mechanics one. The chapter is organized into two parts. In the first one bivariate separation is studied, including discussions on the equivalence of proper orthogonal decomposition (POD, continuous framework) and singular value decomposition (SVD, discrete matrices). Then, in the second part, a wide review of tensor formats and their approximation is proposed. Such work has already been provided in the literature but either on separate papers or into a pure applied mathematics framework. Here, we offer to the data enthusiast scientist a description of Canonical, Tucker, Hierarchical and Tensor train formats including their approximation algorithms. When it is possible, a careful analysis of the link between continuous and discrete methods will be performed.IV Research and Transfer Plan of the University of SevillaInstitut CarnotJunta de AndalucíaIDEX program of the University of Bordeau

Sub-Nanosecond Clock and Data Recovery in an Optically-Switched Data Centre Network

We demonstrate a clock and data recovery technique that achieves <625ps locking time for 25.6Gb/s-OOK and show its robustness under worst-case data centre temperature variation. The locking time was improved by 12×, making nanosecond optical switching viable in data centres